IEEE DTTIS’26 Plenary Session

Keynote 1

Test and Diagnosis Challenges for High-Yield Manufacturing in the Ångström Era

Plenary Session Summary:

As semiconductor technology advances into the Ångström era, the complexity of integrated circuits and manufacturing processes has reached unprecedented levels. This evolution introduces significant challenges for test, diagnosis, and failure analysis, where traditional approaches struggle to keep pace with shrinking geometries, increasing device variability, and heightened defect sensitivity. Ensuring diagnostic accuracy, identifying systematic issues, and minimizing test time is no longer just a technical objective; it is a strategic imperative for yield improvement and overall fab competitiveness.

This talk will examine the critical obstacles in test and diagnosis for advanced nodes, including the impact of ultra-scaled features on fault isolation, the limitations of conventional methodologies, and the growing need for adaptive, data-driven strategies. We will showcase innovative solutions that leverage machine learning, real-time analytics, and design-for-test enhancements to improve diagnostic quality, accelerate root-cause analysis, and enable faster corrective actions. These advancements contribute to higher yield, reduced cost, and quicker time-to-market. Special emphasis will be placed on the challenges of analyzing large-scale diagnostic data to uncover systematic defects early, enabling proactive process improvements, design corrections, and preventing costly excursions.

Attendees will gain insights into how leading-edge fabs are redefining test and diagnosis strategies to achieve uncompromising precision, accelerate time-to-yield, and maintain competitiveness in today’s most advanced manufacturing environments.

Presenter: Full name: Aymen Ladhar Affiliation: Engineer at Intel Ireland Email: aymen.ladhar@intel.com

Presenter Biography:
Aymen Ladhar received his Ph.D. in Electrical Engineering from the University of Sfax, Tunisia, in 2010. He is currently a Senior Staff Engineer at Intel Ireland, where he leads activities in scan and memory diagnostic setup and analysis. Before joining Intel, he was a member of the technical staff at STMicroelectronics, contributing significantly to the development of scan diagnostic methodologies and the optimization of test flows. His research interests include VLSI testing, fault diagnosis, and yield improvement, and he has authored several papers and book chapters in these areas

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Keynote 2

Low Power Challenges in IoT and IoE

Plenary Session Summary:

The increasing number of devices connected to the internet is providing the concept of Internet of Things, that together with Internet of Health, Internet of People and Internet of Something is constructing the Internet of Everything (IoE). There is also an overlapping between IoT and CPS (Cyber Physical Systems) that have as components not only electronic ones, but also mechanical components, optical components, organic components, chemical components, etc. A keyword in IoT is optimization, mainly power optimization. Power optimization must be done in all levels of design abstraction, and at physical level is related to the number of transistors. Also, many systems are critical ones, like in Internet of Heath, where reliability is a major issue. Most of the circuits designed nowadays use much more transistors than it is needed. The increasing leakage power and routing issues are an important reason to optimize the number of transistors, as leakage power is related to the number of transistors. Also, the replacement of a set of basic gates by a complex gate reduces the number of connections to be implemented using metal layers as well the number of vias. The reduction of the number of connections to be implemented using metal layers helps to improve routing and also helps to improve reliability. To cope with this goal, it is needed to provide tools to automatically generate the layout of any transistor network.

Presenter: Full name: Ricardo Reis Affiliation: Instituto de Informática, Universidade Federal do Rio Grande do Sul, at Porto Alegre, Brazil Email: reis@inf.ufrgs.br

Presenter Biography:
Ricardo Reis received a Bachelor degree in Electrical Engineering from Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil, in 1978, and a Ph.D. degree in Microelectronics from the National Polytechnic Institute of Grenoble (INPG), France, in 1983. Doctor Honoris Causa by the University of Montpellier in 2016. He is a full professor at the Informatics Institute of Federal University of Rio Grande do Sul. His main research includes physical design automation, design methodologies, fault tolerant systems and microelectronics education. He has more than 750 publications including books, journals and conference proceedings. He was vice-president of IFIP (International Federation for Information Processing) and he was also president of the Brazilian Computer Society (two terms) and vice-president of the Brazilian Microelectronics Society. He is an active member of CASS and he received the 2015 IEEE CASS Meritorious Service Award. He was vice-president of CASS for two terms (2008/2011). He is the founder of the Rio Grande do Sul CAS Chapter, which got the World CASS Chapter of The Year Award 2011, 2012, 2018 and 2022, and R9 Chapter of The Year 2013, 2014, 2016, 2017 and 2020. He is a founder of several conferences like SBCCI and LASCAS, the CASS Flagship Conference in Region 9. He was the General or Program Chair of several conferences like IEEE ISVLSI, SBCCI, IFIP VLSI-SoC, ICECS, PATMOS. Ricardo was the Chair of the IFIP/IEEE VLSI-SoC Steering Committee, vice-chair of the IFIP WG10.5 and he is Chair of IFIP TC10. he received the Researcher of the Year Award in the state of Rio Grande do Sul. He is a founding member of the SBC (Brazilian Computer Society) and also founding member of SBMicro (Brazilian Microelectronics Society). He was member of CASS DLP Program (2014/2015), and he has done more than 70 invited talks in conferences. He is the CASS representative at the IEEE IoT Technical Committee. Ricardo received the IFIP Fellow Award in 2021 and the ACM/ISPD Lifetime Achievement Award in 2022. He received the 2023 IEEE CASS John Choma Educational Award and the 2024 Best Associate Editor of IEEE CASS Magazine. He is also Distinguished Lecturer of IEEE CEDA (2024-2025).

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Keynote 3

Embodied AI for Next Generation Intelligent Systems

Plenary Session Summary:

Embodied AI represents a major evolution in intelligent systems by tightly coupling perception, cognition, and action within physical or cyber-physical platforms. Moving beyond disembodied, prompt-driven models, embodied intelligent systems integrate sensing, reasoning, and decision-making to autonomously interact with and adapt to dynamic environments. These systems decompose high-level objectives into actionable plans, coordinate perception and control loops, and execute tasks through continuous feedback from sensors, actuators, and external digital resources. Such goal-directed behavior enables intelligent agents to operate reliably under real-world constraints, including latency, energy efficiency, and uncertainty. This paradigm shift supports the development of autonomous and collaborative systems capable of managing complex tasks, learning from interaction, and adjusting strategies in real time. In healthcare-oriented intelligent systems, embodied AI enables diagnostic and decision-support platforms that fuse multimodal sensor data, patient context, and clinical knowledge to assist practitioners. Wearable and embedded sensing devices further support personalized and adaptive care by enabling continuous monitoring and closed-loop adjustment of treatment strategies. By unifying embedded intelligence, real-time inference, and system-level integration, embodied AI paves the way for scalable, efficient, and trustworthy intelligent systems operating at the edge.

Presenter: Full name: Fakhri Karray Affiliation: University of Waterloo Email: fkarray@gmail.com

Presenter Biography:
Fakhri Karray is the inaugural co-director of the University of Waterloo’s Artificial Intelligence Institute and served as the Loblaws Research Chair in Artificial Intelligence in the department of electrical and computer engineering. He is also a Professor of Machine Learning at the Mohamed bin Zayed University of Artificial Intelligence (MBZUAI), where he has served as Provost. Fakhri's research focuses on operational and generative AI, cognitive machines, and autonomous systems with applications to AI-based virtual care systems, self-aware devices, and predictive analytics in innovative mobility systems. He has served in editorial roles at major publications in intelligent systems and information fusion. Fakhri's latest textbook, "Elements of Dimensionality Reduction and Manifold Learning," was published by Springer Nature in 2023. In 2021, he was honored by the IEEE Vehicular Technology Society (VTS) with the IEEE VTS Best Land Transportation Paper Award for his pioneering research on enhancing traffic flow prediction using deep learning and AI. His research on federated learning in communication systems earned him and his co-authors the 2022 IEEE Communication Society's MeditCom Conference Best Paper Award. He holds fellowships with the IEEE, the Canadian Academy of Engineering, and the Engineering Institute of Canada. Additionally, he has served as a Distinguished Lecturer for the IEEE and is a Fellow of the Kavli Frontiers of Science. Fakhri holds a Ph.D. from the University of Illinois Urbana-Champaign, USA.